/** 
 * @file USCI_UART_Regs.h
 * 
 * @detail Description : 
 * Generic UART definitions
 * 
 * @author VMHOANG68
 * @author
 * @date August, 2012
 * @version 1.0 - Initial version
 * @note Built with IAR Embedded Workbench: 5.20.1 and CCS Version 5.1.0.09000
 **/

#ifndef USCI_UART_DEFINITIONS_H_
#define USCI_UART_DEFINITIONS_H_

// F5529  Family: USCI_I2C_B0, USCI_I2C_B1
#if defined(__MSP430G2553__)
	#define UCAxCTL0		 UCA0CTL0		/* USCI Control Register 0 */
	#define UCAxCTL1    	 UCA0CTL1		/* USCI Control Register 1 */
	#define UCAxBR0     	 UCA0BR0		/* USCI Baud Rate 0 */
	#define UCAxBR1     	 UCA0BR1		/* USCI Baud Rate 1 */
	#define UCAxMCTL		UCA0MCTL		/*USCI Modulation control register*/
	#define UCAxSTAT    	 UCA0STAT		/* USCI Status Register */
	#define UCAxRXBUF   	 UCA0RXBUF		/* USCI Receive Buffer */
	#define UCAxTXBUF   	 UCA0TXBUF		/* USCI Transmit Buffer */
	#define UCAxABCTL		UCA0ABCTL		/* USCI Auto baud control register*/
	#define UCAxIRTCTL		UCA0IRTCTL		/* USCI IrDA transmit control register*/
	#define UCAxIRRCTL		UCA0IRRCTL		/*USCI IrDA receive control register*/
	#define UCAxIE 		     IE2   		/* USCI Interrupt Enable Register */
	#define UCAxIFG		     IFG2    	/* USCI Interrupt Flags Register */
	#define UCAxRXIE         BIT0
	#define UCAxTXIE         BIT1
	#define UCAxRXIFG        BIT0
	#define UCAxTXIFG        BIT1
	#define USCI_Ax_TX_VECTOR   USCIAB0TX_VECTOR
	#define USCI_Ax_RX_VECTOR	USCIAB0RX_VECTOR
    // Pin Definitions
    #define PxDIR_RXD		 P1DIR
    #define PxDIR_TXD		 P1DIR
    #define PxOUT_RXD		 P1OUT
    #define PxOUT_TXD		 P1OUT
    #define PxSEL_RXD		 P1SEL
    #define PxSEL_TXD		 P1SEL
    #define PxSEL2_RXD		 P1SEL
    #define PxSEL2_TXD		 P1SEL
	#define PxREN_RXD		 P1REN
	#define PxREN_TXD		 P1REN
    #define RXD_BIT			 BIT1
    #define TXD_BIT 		 BIT2
#endif

#endif /*USCI_I2C_DEFINITIONS_H_*/
